**Please read the paper on the following link:**

https://ieeexplore.ieee.org/document/9169659

**Abstract:**

This work presents the first on-chip bio-inspired reservoir computer (RC) prototype implemented in 65nm CMOS. The RC comprises 50 time-multiplexed neurons, and each neuron embeds a strong non-linearity in a feedback loop. The RC applies a non-linear transformation to the input and projects it to high-dimensional space, thus allowing linear separation by a simple logistic regression (LR) layer implemented off-chip. We demonstrate real-time stress detection from electrocardiogram (ECG) signals using the RC. The RC achieves 93% classification accuracy, which is 6% better than state-of-the-art digital classifiers. Operating at 40kHz, the prototype consumes 27.5nJ/classification, which is 7x lower than state-of-the-art ECG processors performing similar complexity classification tasks.

A Bio-Inspired Reservoir-Computer for Real-Time Stress Detection from ECG Signal

**Please read the paper on the following link:**

https://1worldcontent.com/ess/9261.pdf

**Abstract:**

This work presents the first on-chip, mixed-signal echo state network (ESN) for the early prediction of heart disease. The ESN comprises an input layer, a non-linear projection (NP) layer, and an output layer. Only the output layer of the ESN requires training. The input layer weights are time-invariant and drawn from a static binary random distribution. Thus, the proposed ESN has significantly lower trainable parameters than other non-linear neural networks used for similar prediction tasks. A 65nm prototype is validated with the Cleveland Heart Disease (CHD) dataset. The ESN achieves a mean accuracy of 84.6% over 5 test chips while consuming 7.5nJ energy/inference.

7.5nJ/Inference CMOS Echo State Network for Coronary Heart Disease Prediction

**Session Chairs:** Minhao Yang, École Polytechnique Fédérale de Lausanne; Mirjana Banjevic, Sensirion AG

B3L-1: Imaging, MEMS, Sensors (JOINT 2020 TEDbrief special edition & SSC-L special edition)

technical paper

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.

Highlights:
* 3 joint keynote presentations
* 3 keynote presentations ESSCIRC
* 3 keynote presentations ESSDERC
* Invited papers with overall coverage of all aspects of advanced devices and circuits
* Presentation of IEEE and ESSCIRC/ESSDERC Awards
* Educational Events

JOINT PLENARY talks live broadcast: September 13, 2021 
ESSCIRC and ESSDERC KEYNOTE talks live broadcast: September 15, 2021 
LIVE Q&A INTERACTIVE sessions for all Conference Technical sessions: September 14 – 16 – 17, 2021 
LIVE Q&A INTERACTIVE sessions for all Educational Events: September 20-21-22, 2021 
(on demand videos available from September 6 until November 30, 2021)

**Please see here for the [ESSCIRC Guide](https://drive.google.com/file/d/10dghzuv4aQBty4QfTIY9Q8hXyqsue8Le/view?usp=sharing), [ESSDERC Guide](https://drive.google.com/file/d/10dx9y2tm9cHPDa4upNUYjfXCf44aPry5/view?usp=sharing), and the [Program at a Glance](https://drive.google.com/file/d/10eU0OLTXEpiNzI5hkqv4mSr43T8cedPP/view?usp=sharing)**

To access ESSCIRC ESSDERC 2021, you must pre-register for the conference.  Instructions on how to access the event will be provided directly to attendees and included on the ESSCIRC ESSDERC conference website. [Register now](https://www.esscirc-essderc2021.org/).

Please register for the ESSCIRC conference to join the event.

ESSCIRC ESSDERC 2021

The aim of ESSCIRC and ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits.
The level of integration for system-on-chip design is rapidly increasing.

This is made available by advances in semiconductor technology. Therefore, more than ever before, a deeper interaction among technologists, device experts, IC designers, and system designers is necessary. ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both device and circuit communities.





**Session Chairs:** Antoine Frappé, Institut Supérieur de l'Électronique et du Numérique; Marian Verhelst, Katholieke Universiteit Leuven

Imon Banerjee

2

29

Presentations

A Bio-Inspired Reservoir-Computer for Real-Time Stress Detection from ECG Signal

7.5nJ/Inference CMOS Echo State Network for Coronary Heart Disease Prediction

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